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Design of an Efficient Low Power 4-bit Arithmatic Logic Unit (ALU) Using VHDL

by Giridhari Muduli, Bibhudatt Pradhan, Manas Ranjan Jena and Snigdharani Nath

International Transaction of Electrical and Computer Engineers System. 2014, 2(5), 144-148. DOI: 10.12691/iteces-2-5-3
Pub. Date: December 08, 2014Views: 59528 Downloads: 48393Like: 42

CPU GPU ALU RCA CSA CMOS

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