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About
Journal of Embedded Systems
ISSN (Print):
2376-7987
ISSN (Online):
2376-7979
Website:
https://www.sciepub.com/journal/jes
Editor-in-chief:
Naima kaabouch
Open Access
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Vol. 6, 2023
Vol. 5, 2018
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Vol. 2, 2014
Vol. 1, 2013
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Content: Volume 2, Issue 1
Open Access
Article
Estimating Message Latencies in Time-Triggered Shared-Clock Scheduling Protocols Built on CAN Network
by
Mouaaz Nahas
Journal of Embedded Systems
.
2014
, 2(1), 1-10. DOI: 10.12691/jes-2-1-1
Pub. Date: January 01, 2014
Views: 49979
Downloads: 45876
Like:
38
Citations: 2
scheduler
architecture
Master
Slave
jitter
time-triggered
co-operative
Shared-Clock
Controller Area Network
message latency
Abstract
Full Text PDF
(286 KB)
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(223 KB)
Figure
3
of 15
Open Access
Article
System on Chip (PSoC) Control for High Current Magnet Power Supply
by
K.G. Padmasine
and
S. Muruganand
Journal of Embedded Systems
.
2014
, 2(1), 11-14. DOI: 10.12691/jes-2-1-2
Pub. Date: February 06, 2014
Views: 18510
Downloads: 13451
Like:
33
Citations: 1
Programmable System on Chip
Virtual Instrumentation
Magnetic power supply
Abstract
Full Text PDF
(215 KB)
Full Text HTML
Full Text ePUB
(321 KB)
Figure
2
of 3
Open Access
Article
Design of Embedded Sing-around System for Ultrasonic Velocity Measurements in Liquids
by
S. J. Sharma
,
A. C. Balharpure
,
A. S. Pande
,
S. U. Dubey
,
G. K. Singh
,
V. M. Ghodki
and
S. Rajagopalan
Journal of Embedded Systems
.
2014
, 2(1), 15-17. DOI: 10.12691/jes-2-1-3
Pub. Date: February 08, 2014
Views: 21650
Downloads: 16358
Like:
106
Citations: 3
pulse method
sing around technique
embedded system
PIC 18F4550
time of flight measurement
ultrasonic velocity
intelligent system
Abstract
Full Text PDF
(212 KB)
Full Text HTML
Full Text ePUB
(253 KB)
Figure
3
of 3
Open Access
Article
Decision Based Median Filter Algorithm Using Resource Optimized FPGA to Extract Impulse Noise
by
Rutuja N. Kulkarni
and
P.C. Bhaskar
Journal of Embedded Systems
.
2014
, 2(1), 18-22. DOI: 10.12691/jes-2-1-4
Pub. Date: March 22, 2014
Views: 29008
Downloads: 23330
Like:
38
impulse
median filter
PSNR
salt & pepper
FPGA
Abstract
Full Text PDF
(294 KB)
Full Text HTML
Full Text ePUB
(232 KB)
Figure
2
of 9
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