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Design of an Efficient Dedicated Low Power High Speed Full Adder

by Asirbad Behera, Manas Ranjan Jena, Abhinna Das and Narendra Kumar Pattnayak

Journal of Embedded Systems. 2014, 2(3), 35-38. DOI: 10.12691/jes-2-3-1
Pub. Date: July 15, 2014Views: 33788 Downloads: 29202Like: 39

PDA CMOS VLSI PDP NMOS

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