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Tarek M. Bittibssi, Gouda I. Salama, Yehia Z. Mehaseb and Adel E. Henawy “Image Enhancement Algorithms using FPGA” International Journal of Computer Science & Communication Networks, Vol. 2 (4), 536-542.

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Article

Decision Based Median Filter Algorithm Using Resource Optimized FPGA to Extract Impulse Noise

1Research Scholar, Department of Technology, Shivaji University, Kolhapur

2Professor, Department of Technology, Shivaji University, Kolhapur


Journal of Embedded Systems. 2014, Vol. 2 No. 1, 18-22
DOI: 10.12691/jes-2-1-4
Copyright © 2014 Science and Education Publishing

Cite this paper:
Rutuja N. Kulkarni, P.C. Bhaskar. Decision Based Median Filter Algorithm Using Resource Optimized FPGA to Extract Impulse Noise. Journal of Embedded Systems. 2014; 2(1):18-22. doi: 10.12691/jes-2-1-4.

Correspondence to: Rutuja  N. Kulkarni, Research Scholar, Department of Technology, Shivaji University, Kolhapur. Email: kulkarni.rutuja@gmail.com

Abstract

Median filter is a non-linear filter used in image processing for impulse noise removal. It finds its typical application in the situations where edges are to be preserved for higher level operations like segmentation, object recognition etc. This paper presents accurate and efficient noise detection and filtering algorithm for impulse noise removal. The algorithm includes two stages: noise detection followed by noise filtering. The proposed algorithm replaces the noisy pixel by clipping median value when other pixel values, 0’ s or 255’ s are present in the selected window and when all the pixel values are 0’ s and 255’ s then the noise pixel is replaced by mean value of all the elements present in the selected window. This median filter was designed, simulated and synthesized on the Xilinx family of FPGAs (XC3S500E of Spartan-3E). The VHDL was used to design the above 2-D median filter using ISE (Xilinx) tool & tested & compared for different grayscale images.

Keywords