1Grup de Recerca en Micro i Nanotecnologies (MNT), Universitat Politècnica de Catalunya (UPC), C. Jordi Girona, Barcelona, Spain
Journal of Optoelectronics Engineering.
2015,
Vol. 3 No. 1, 7-14
DOI: 10.12691/joe-3-1-2
Copyright © 2015 Science and Education PublishingCite this paper: Iduabo John Afa, Gema López, Pablo Rafael Ortega Villasclaras. Etching Techniques for Thinning Silicon Wafer for Ultra Thin High Efficiency Interdigitated Back Contact Solar Cells.
Journal of Optoelectronics Engineering. 2015; 3(1):7-14. doi: 10.12691/joe-3-1-2.
Correspondence to: Iduabo John Afa, Grup de Recerca en Micro i Nanotecnologies (MNT), Universitat Politècnica de Catalunya (UPC), C. Jordi Girona, Barcelona, Spain. Email:
iduabo.john.afa@estudiant.upc.eduAbstract
High efficiency Interdigitated back contact (IBC) solar cells help reduce the area of solar panels needed to supply sufficient amount of energy for household consumption. We believe that a properly passivated IBC cell with the aid of light trapping schemes can maintain an efficiency of 20% even with thickness under 20 μm. In this work, photolithography and etching techniques are used for deep etching of crystalline Silicon (c-Si) wafer to a thickness less than 20 μm. Tetramethylammoniumhydroxide (TMAH) wet anisotropic etching and plasma based Reactive ion etching (RIE) are used with SPR 220-7.0 and SU-8 photoresists. SiO2 is used as making layer for TMAH etching. TMAH etch of a 4-inch c-Si wafer is done at a temperature of 80°C for 8 hours. RIE of a quarter of a 4-inch c-Si wafer is done for 3 hours using SF6 as reactive gas. A baseline photolithography process flow for SU-8 photoresist deposition was developed. The etch rates of TMAH etch techniques fall within the range of 0.3 – 0.45 μm/min and etch rates for RIE fall within the range of 1.2 – 1.8 μm/min. The RIE shows capability of achieving smaller thickness sizes with greater advantages than the TMAH etching technique.
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