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<ArticleSet>
  <Article>
    <Journal>
      <PublisherName>Science and Education Publishing</PublisherName>
      <JournalTitle>American Journal of Electrical and Electronic Engineering</JournalTitle>
      <Volume>2</Volume>
      <Issue>3</Issue>
      <PubDate PubStatus="epublish">
        <Year>2014</Year>
        <Month>05</Month>
        <Day>09</Day>
      </PubDate>
    </Journal>
    <ArticleTitle>New Multiplier/Divider Using a Single Cdba</ArticleTitle>
    <FirstPage>98</FirstPage>
    <LastPage>102</LastPage>
    <Language>EN</Language>
    <AuthorList>
      <Author>
        <FirstName>J. K.</FirstName>
        <LastName>Pathak</LastName>
      </Author>
      <Author>
        <FirstName>A. K.</FirstName>
        <LastName>Singh</LastName>
      </Author>
      <Author>
        <FirstName>Raj</FirstName>
        <LastName>Senani</LastName>
        <Affiliation>Division of Electronics and Communication Engineering, Netaji Subhas Institute of Technology, Sector 3, Dwarka, New Delhi, India</Affiliation>
      </Author>
    </AuthorList>
    <ArticleIdList>
      <ArticleId IdType="pii">AJEEE2014237</ArticleId>
      <ArticleId IdType="doi">10.12691/ajeee-2-3-7</ArticleId>
    </ArticleIdList>
    <History>
      <PubDate PubStatus="received">
        <Year>2013</Year>
        <Month>09</Month>
        <Day>29</Day>
      </PubDate>
      <PubDate PubStatus="revised">
        <Year>2013</Year>
        <Month>11</Month>
        <Day>28</Day>
      </PubDate>
      <PubDate PubStatus="accepted">
        <Year>2014</Year>
        <Month>05</Month>
        <Day>09</Day>
      </PubDate>
    </History>
    <Abstract>A new multiplier-divider circuit using a single Current Differencing Buffered Amplifier (CDBA) and only six MOSFETs has been presented. The proposed circuit has the advantage of simultaneously realizing a multiplier and divider without changing the circuit topology. The basic functions of the proposed circuit have been verified through PSPICE simulations using a CMOS CDBA and NMOS transistors with process parameters of 0.35 µm CMOS technology and some application results of the proposed cell in various modes of operation have been included.</Abstract>
  </Article>
</ArticleSet>