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<records>
  <record>
    <language>eng</language>
    <publisher>Science and Education Publishing</publisher>
    <journalTitle>American Journal of Electrical and Electronic Engineering</journalTitle>
    <publicationDate>2014-05-09</publicationDate>
    <volume>2</volume>
    <issue>3</issue>
    <startPage>98</startPage>
    <endPage>102</endPage>
    <doi>10.12691/ajeee-2-3-7</doi>
    <publisherRecordId>AJEEE2014237</publisherRecordId>
    <documentType>article</documentType>
    <title language="eng">New Multiplier/Divider Using a Single Cdba</title>
    <authors>
      <author>
        <name>J. K. Pathak</name>
        <affiliationId>1</affiliationId>
      </author>
      <author>
        <name>A. K. Singh</name>
        <affiliationId>2</affiliationId>
      </author>
      <author>
        <name>Raj Senani</name>
        <email>senani@ieee.org</email>
        <affiliationId>3</affiliationId>
      </author>
    </authors>
    <affiliationsList>
      <affiliationName affiliationId="1">Department of Electronics and Communication Engineering, Echelon Institute of Technology, Faridabad, India</affiliationName>
      <affiliationName affiliationId="2">Departments of Electronics and Communication Engineering, Faculty of Engineering and Technology, HRCT Group of Institutions, Morta, Ghaziabad, India</affiliationName>
      <affiliationName affiliationId="3">Division of Electronics and Communication Engineering, Netaji Subhas Institute of Technology, Sector 3, Dwarka, New Delhi, India</affiliationName>
    </affiliationsList>
    <abstract language="eng">A new multiplier-divider circuit using a single Current Differencing Buffered Amplifier (CDBA) and only six MOSFETs has been presented. The proposed circuit has the advantage of simultaneously realizing a multiplier and divider without changing the circuit topology. The basic functions of the proposed circuit have been verified through PSPICE simulations using a CMOS CDBA and NMOS transistors with process parameters of 0.35 µm CMOS technology and some application results of the proposed cell in various modes of operation have been included.</abstract>
    <fullTextUrl format="pdf">http://pubs.sciepub.com/ajeee/2/3/7/ajeee-2-3-7.pdf</fullTextUrl>
    <keywords language="eng">
      <keyword>analog multipliers</keyword>
      <keyword>Analog Dividers</keyword>
      <keyword>Current differencing buffered amplifiers</keyword>
      <keyword>Analog Integrated Circuits</keyword>
      <keyword>Analog Signal Processing</keyword>
      <keyword>CMOS Circuits</keyword>
    </keywords>
  </record>
</records>