@article{ajeee2013121,
author={AUTHOR = {Sorkhabi, Majid Memarian and Toofan, Siroos},
title={A High Resolution First Order Noise-Shaping Vernier Time-to-Digital Converter},
journal={American Journal of Electrical and Electronic Engineering},
volume={1},
number={2},
pages={19--22},
year={2013},
url={http://pubs.sciepub.com/ajeee/1/2/1},
abstract={In this paper, we propose a noise reduction method for a Vernier Time-to-Digital Converter (VTDC) using a first-order noise shaping structure and a gated ring oscillator (GRO). An 11bit VTDC with 4 p s effective resolution was designed and developed for a high performance All Digital Frequency Synthesizer (ADFS). The VTDC realized in 180nm CMOS, its power consumption depending on the time difference between input edges; 1 to 11mA from a 1.5 V supply.},
doi={10.12691/ajeee-1-2-1}
publisher={Science and Education Publishing}
}